Agilent Technologies 54502A Manuale di Servizio Scaricare il pdf (Pagina 53)

Clock,

Qualifier, and

Data Inputs

Test 5

Description: This performance test verifies the maximum clock rate for mixed

mode clocking during state operation.

Specification:

Clock repetition rate: H P 1650B single phase is 35 MHz maximum, HP 1651B is

25 MHz. With time or state counting, minimum time between states is 60 ns (16.7

MHz maximum). Both mixed and demultiplexed clocking use master-slave clock

timing; master clock must follow slave clock by at least 10 ns and precede the next

slave clock by 50 ns.

Equipment:

Pulse Generator ............................... HP 8161A/020

Oscilloscope ..................................... HP 54502A

50 Ohm Feedthru (2) .............................. HP 10100C

Test Connectors see figure 3-1..........................(2)

Procedure:

1. Connect the HP 1650B/51B and test equipment as in figure 3-21 by

connecting channels 0-3 and 8-11 of the pod under test to the test connector.

On the slave clock transition the four bits of the lower byte are transferred to

the logic analyzer, and on the master clock transition the four bits of the

upper byte are transferred to the logic analyzer.

Note In this setup, only eight channels are tested at a time to minimize loading. Ground

lead must be connected to ensure accurate test results.

Figure 3-21. Setup for Data Test 5

Performance Tests HP 1650B/1651B

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Agilent Technologies 54502A Manuale di Servizio Pagina 53