
Clock,
Qualifier, and
Data Inputs
Test 6
Description: This performance test verifies the maximum clock rate for
demultiplexed clocking during state operation.
Specification:
Clock repetition rate: H P 1650B single phase 35 MH z maximum, HP 1651B single
phase 25 MHz. With time or state counting, minimum time between states is 60 ns
(16.7 MHz maximum). Both mixed and demultiplexed clocking use master-slave
clock timing; master clock must follow slave clock by at least 10 ns and precede
the next slave clock by 50 ns.
Equipment:
Pulse Generator ............................... HP 8161A/020
Oscillscope....................................... HP 54502A
50 Ohm Feedthru (2) .............................. HP 10100C
Test Connectors (2)..........................see figure 3-1
Procedure:
1. Connect the HP 1650B/51B and test equipment as in figure 3-25 by
connecting channels 0-7 of the pod under test to the test connector. During
demultiplexed clocking only the lower eight bits of each pod are used.
Figure 3-25. Setup for Data Test 6
HP 1650B/1651B Performance Tests
Service Manual 3-21
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