Agilent Technologies HP 8642A/B Specifiche Pagina 264

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PLL GAIN CHANGE: This is the amount of gain change required to fit the
Theoretical Loop Suppression curve to the measured loop suppression.
A PLL GAIN CHANGE of greater than 1 dB will create an Accuracy
Specification Degradation Error. If an Accuracy Specification Degradation
is detected, the amount of error is determined from either the PLL GAIN
CHANGE or the MAX ERROR, which ever is larger. The degradation itself
is 1 dB less than the greater of these.
MAX ERROR: This is the measured error that still exists between the
the measured Loop Suppression and the Adjusted Theoretical Loop
Suppression. The four points on the Loop Suppression graph marked with
arrows (ranging from the3 dB point down approximately8 dB) are
the points over which the MAX ERROR is determined. An error of greater
than 1 dB will result in an Accuracy Specification Degradation.
CLOSED PLL BW: This is the predicted Phase Lock Loop Bandwidth for
the measurement. The predicted PLL BW is based on the predicted PTR.
The Closed PLL BW will not be adjusted as a result of an Accuracy
Specification Degradation. If an Accuracy Specification Degradation is
detected, the amount of error is determined from either the PLL GAIN
CHANGE or the MAX ERROR, which ever is larger. The degradation itself
is 1 dB less than the greater of these.
PK TUNE RANGE: This is the Peak Tuning Range (PTR) for the measure-
ment determined from the Tuning Constant and the Voltage Tune Range.
This is the key parameter in determining the PLL properties, the Drift
Tracking Range, and the ability to phase lock sources with high close in
noise.
5-6 Test Mode
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