Agilent Technologies HP 8642A/B Specifiche Scaricare il pdf (Pagina 265)

The PTR displayed should be approximately equal to the product of the

VCO Tune Constant times the Voltage Tune Range. This will not be the

case when a significant Accuracy Specification Degradation is detected

( > 4 dB) by the Loop Suppression Verification. In this case, the PTR and

Assumed Pole are adjusted when fitting the Theoretical Loop Suppression

to the smoothed measured Loop Suppression, and the system will not

display the adjusted PTR. If the PTR must be adjusted by more than 1 dB,

as indicated by an Accuracy Specification Degradation of greater than

0 dB, the Phase Detector Constant or the VCO Tuning Constant is in error

at frequency offsets near the PLL BW, or the PLL BW is being affected by

some other problem such as injection locking.

ASSUMED POLE: This is the frequency of the Assumed Pole required to

adjust the Theoretical Loop suppression to match the smoothed measured

Loop suppression. The Assumed Pole frequency will normally be much

greater than the CLOSED PLL BW. An Assumed Pole frequency of less

than 10 x PLL BW is an indication of peaking on the PLL Suppression

curve. For PLL BWs less than 20 kHz, an Assumed Pole of less than

10 x PLL BW indicates a delay or phase shift in the VCO Tune Port. For

PLL BWs greater than 20 kHz, the Assumed Pole may be adjusted to less

than 10 x PLL BW to account for phase shifts in the HP 11848A.

DET.

CONSTANT: This is the Phase Detector Constant (sensitivity of the

phase detector) used for the measurement. The accuracy of the Phase

Detector Constant is verified if the PLL suppression is verified. The

accuracy of the Phase Detector Constant determines the accuracy of the

noise measurement.

The Phase Detector Constant value, along with the LNA In/Out parame-

ter, determines the HP 3048A System noise floor exclusive of the reference

source.

Test Mode 5-7

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Agilent Technologies HP 8642A/B Specifiche Pagina 265